Artefacts and Contributors

Repositories, tools, research artefacts, and contributors for AnvilHDL.

Artefacts

• Anvil compiler: Compiles Anvil to SystemVerilog; includes tests and example designs.

• Language server and editor extensions: Provides experimental Anvil language support for VS Code and Vim/Neovim.

• Documentation: Contains the source for this site, including the tutorial and language reference.

• Online playground: Lets you run Anvil programs in your browser.

• Research paper: Describes Anvil’s design, timing safety, and evaluation. See the BibTeX citation.

• Evaluation experiments: Contains the evaluation designs, test harnesses, synthesis reports, and reproduction instructions.

• RISCy experiment: A simple pipelined RISC-V processor written in Anvil.

Contributors

Listed alphabetically.

• Aditya Ranjan Jha (@arj4web)

• Flavien Solt (@flaviens)

• Jason Yu (@jasonyu1996)

• Omar Islam Laskar (@MaLsIrAmO)

• Prateek Saxena (@prateeksaxena)

• Sivapriya (@Siya-05)

• sweiglbosker (@sweiglbosker)

• Wern (@wxwern)

Community and contributions

Join the AnvilHDL Zulip community to discuss the language and share feedback. To report a problem or propose a change, use the relevant repository:

• Compiler issues

• Language server issues

• Documentation issues