# Artefacts and Contributors

Repositories, tools, research artefacts, and contributors for [AnvilHDL](https://github.com/AnvilHDL).

## Artefacts

- [Anvil compiler](https://github.com/AnvilHDL/anvil): Compiles Anvil to SystemVerilog; includes tests and example designs.
- [Language server and editor extensions](https://github.com/AnvilHDL/anvil-lsp): Provides experimental Anvil language support for VS Code and Vim/Neovim.
- [Documentation](https://github.com/AnvilHDL/anvil-docs): Contains the source for this site, including the tutorial and language reference.
- [Online playground](https://anvil.kisp-lab.org/): Lets you run Anvil programs in your browser.
- [Research paper](https://dl.acm.org/doi/10.1145/3779212.3790125): Describes Anvil's design, timing safety, and evaluation. See the {ref}`BibTeX citation <anvil-citation>`.
- [Evaluation experiments](https://github.com/AnvilHDL/AnvilHDL-Experiments): Contains the evaluation designs, test harnesses, synthesis reports, and reproduction instructions.
- [RISCy experiment](https://github.com/AnvilHDL/anvil-RISCy-Experiment): A simple pipelined RISC-V processor written in Anvil.

## Contributors

Listed alphabetically.

- Aditya Ranjan Jha ([@arj4web](https://github.com/arj4web))
- Flavien Solt ([@flaviens](https://github.com/flaviens))
- Jason Yu ([@jasonyu1996](https://github.com/jasonyu1996))
- Omar Islam Laskar ([@MaLsIrAmO](https://github.com/MaLsIrAmO))
- Prateek Saxena ([@prateeksaxena](https://github.com/prateeksaxena))
- Sivapriya ([@Siya-05](https://github.com/Siya-05))
- sweiglbosker ([@sweiglbosker](https://github.com/sweiglbosker))
- Wern ([@wxwern](https://github.com/wxwern))

## Community and contributions

Join the [AnvilHDL Zulip community](https://anvilhdl.zulipchat.com/) to discuss the language and share feedback. To report a problem or propose a change, use the relevant repository:

- [Compiler issues](https://github.com/AnvilHDL/anvil/issues)
- [Language server issues](https://github.com/AnvilHDL/anvil-lsp/issues)
- [Documentation issues](https://github.com/AnvilHDL/anvil-docs/issues)